BIT team's paper selected for the first time at RFIC

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The Radio Frequency Integrated Circuits Symposium (RFIC) was held in San Francisco, the United States on June 15 to 17. A paper completed by the team led by Sun Houjun from the School of Integrated Circuits and Electronics at Beijing Institute of Technology (BIT) was selected at the symposium.

This marks the first time that BIT has presented a paper at this event.

RFIC is the highest-level conference in the field of radio frequency integrated circuits and is the premier forum focusing on showcasing the latest research achievements in radio frequency and millimeter-wave integrated circuits.

BIT's PhD student Ying Jiazhi from the team attended the RFIC in San Francisco, where he presented an oral report on the founding of the paper, showcasing BIT's latest research achievements to peers in the international microwave/radio frequency/millimeter-wave integrated circuit field. His presentation received enthusiastic feedback.

In the forefront applications of 5G/6G communication and radar fields, phased array technology is demonstrating tremendous potential. With the continuous advancement of chip integration density and performance requirements for large-scale phased array systems, power distribution/synthesis networks are facing multidimensional technical challenges such as physical size optimization and control of topological complexity. In response to the complex issues of current large-scale phased array integrated distribution networks, the paper completed by BIT team proposes a low-cost scalable architecture that allows a 2N-element phased array to be rapidly expanded to a 2N+2 array, while significantly reducing chip and PCB processing costs.

At the circuit implementation level, the Wilkinson power divider commonly used in current phased array systems faces a dual challenge of excessive area and limited bandwidth. To address this issue, the paper proposes various novel topological structures and innovatively introduces multi-stage magnetic-coupling self-cancellation technology, enabling the power divider to achieve an expansion of nearly 140 percent in relative isolation bandwidth while reducing its area by half. The electrically symmetric shielding structure simultaneously achieves high isolation and high amplitude-phase consistency among all branches.

This research achievement demonstrates the characteristics of ultra-compact size, wide bandwidth, and high isolation, providing critical technological support for the design of large-scale phased array systems. It is particularly significant for the integration of phased array systems, especially for multi-beam phased arrays.

This work was published under the title An Ultra-Compact and Broadband C–X-Band Wilkinson Power Divider/Combiner Using a Folded Two-Section Mechanism in 65-nm Bulk CMOS Technology.

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